The early NFC standard specified a 13.56MHz wireless communication Proximity card with a data rate up to 848kbps, in the background of the widespread application of smart phone NFC technology, the higher data rate is required. The difficulty in improving the data rate of Proximity cards(PICC) lies in the design of ASK/PSK receiver. It is limited by inter-symbol interface(ISI), power consumption, circuit complexity and so on in practical applications. Aimed at the above problems, a complete design of low power demodulation decoding circuit is proposed, including an all digital timing recovery circuit with high timing accuracy. Implementation of the design adopts standard 0.18μm CMOS technology, the energy efficiency achieved of 147 pJ/bit，and can be applied to 0.106~3.39M bps ASK communication.