一种改进的锁相环用于抑制三相不平衡和直流偏移
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TM762

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上海市电站自动化技术重点实验室开放课题(13DZ2273800);上海市重点科技攻关计划(14110500700);


An improved phase-locked loop for suppressing three-phase unbalance and DC offset
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    摘要:

    研究了解耦双同步参考系锁相环(Decoupling dual synchronous reference system phase-locked loop, DDSRF-PLL)在电网电压不平衡情况下的锁相精度问题。为了消除直流偏移的影响,提出了一种结合混合二阶与三阶广义积分器(Mixed second- and third-order generalized integrator, MSTOGI)的DDSRF-PLL结构,且对其PI控制器引入了一种非线性函数进行控制。首先,利用了MSTOGI的滤波能力,能够有效地衰减谐波和降低直流偏移的影响。其次,非线性函数能够根据系统偏差的大小对PI参数进行调整,提高了锁相的精度和速度。通过Matlab/Simulink进行仿真,证明了文中提出方法的有效性与可靠性。

    Abstract:

    Study the understanding of the phase-locked accuracy of the coupled dual-synchronous reference frame phase-locked loop (Decoupling dual synchronous reference system phase-locked loop,DDSRF-PLL) under grid voltage imbalance. In order to eliminate the influence of DC offset, a DDSRF-PLL structure combining hybrid second-order and third-order generalized integrators (Mixed second- and third-order generalized integrator, MSTOGI) is proposed, and a nonlinear function is introduced to control its PI controller. First, harmonics can be effectively attenuated and the effects of DC offset are reduced through the MSTOGI's filtering capabilities. Secondly, the nonlinear function can adjust the PI parameters according to the size of the system deviation, which improves the accuracy and speed of phase locking. Through Matlab/Simulink to simulate the effectiveness and reliability of the proposed method.

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杨旭红,郝鹏飞,姚凤军,等. 一种改进的锁相环用于抑制三相不平衡和直流偏移[J]. 科学技术与工程, 2020, 20(33): 13705-13711.
yangxuhong. An improved phase-locked loop for suppressing three-phase unbalance and DC offset[J]. Science Technology and Engineering,2020,20(33):13705-13711.

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历史
  • 收稿日期:2019-09-22
  • 最后修改日期:2020-09-11
  • 录用日期:2019-11-30
  • 在线发布日期: 2020-12-18
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