Solid state recorder (SSR) is currently regarded as the most reliable form of data storage medium, but within its life time, single bit error may develop with SSR. To solve this problem, this paper designs a dedicated error correction method for high-speed and large-capacity solid state storage system based on FPGA. Through comparing the ECC stored in the flash block during the write operation with the ECC calculated by the current read operation, an ECC error is detected and the data is corrected with a correcting capability up to 1bit/512B. Simple electrical system and strong correcting capability are achieved by using this method. Experimental results show that the design completely fulfils the need of high-speed data recording and ensure the reliability of the large-capacity SSR.